
MCP2515
DS21801F-page 66
2010 Microchip Technology Inc.
FIGURE 12-5:
LOAD TX BUFFER
FIGURE 12-6:
REQUEST-TO-SEND (RTS) INSTRUCTION
FIGURE 12-7:
BIT MODIFY INSTRUCTION
SO
SI
SCK
CS
0
2345
6789
10 11 12 13 14 15
1
ac
0
1
0b
76543210
instruction
data in
high-impedance
a b c
Address Points to
Addr
00
0
TX buffer 0, Start at
TXB0SIDH
0x31
00
1
TX buffer 0, Start at
TXB0D0
0x36
01
0
TX buffer 1, Start at
TXB1SIDH
0x41
01
1
TX buffer 1, Start at
TXB1D0
0x46
10
0
TX buffer 2, Start at
TXB2SIDH
0x51
10
1
TX buffer 2, Start at
TXB2D0
0x56
SO
SI
SCK
CS
0
2
3
456
7
1
T2
T0
0
1
instruction
high-impedance
T1
SO
SI
SCK
CS
0
2 3 4 5 6 7 8 9 1011 12 1314 15 1617 181920 21 22
1
11
0
A7 6 5 4
1 A0 7 654 32 10
instruction
high-impedance
32
0
address byte
mask byte
7 654 32 10
23 24 25 26 27 28 29 30 31
data byte
Note:
Not all registers can be accessed with
this command. See the register map for a
list of the registers that apply.